1. Field of the Invention
The present invention relates to a semiconductor device in which a semiconductor chip is flip-chip mounted on a circuit board.
2. Description of the Related Art
In manufacturing a semiconductor device, there is employed a flip chip mounting technology in which a semiconductor chip is mounted on a circuit board via a bump with an element surface thereof confronting the circuit board. In the flip chip mounting, connection between the circuit board and the semiconductor chip is made by forming a solder bump or the like on the semiconductor chip side, and then pressing the solder bump or the like against wiring formed on the circuit board. An encapsulant such as an epoxy resin is filled between the circuit board and the semiconductor chip for the purpose of securing moisture resistance or alleviating stress on the solder bump from the circuit board.
The encapsulant described above has a thermal expansion coefficient that is higher than that of the semiconductor chip, and thus, during an environmental test such as a temperature cycling test, large thermal stress is applied on the semiconductor chip. The semiconductor chip and the circuit board also have different thermal expansion coefficients, and thus, large stress is applied to the encapsulant as well. As a result, in the temperature cycling test, due to such stress, the solder bump connection will become unstable and a crack will develop in the semiconductor chip.
It is described in Japanese Patent Application
Laid-open No. 2002-170848 that, in order to avoid such problems, a bump only for joining is formed in a center region of each side of the semiconductor chip where no bump has heretofore been formed and is connected to the circuit board, to thereby improve reliability.
Further, in the filling step of the encapsulant, when an amount and an injection direction of the encapsulant are efficient, the encapsulant does not cover a side surface of the chip in the formed structure, which is illustrated in FIG. 2. A semiconductor chip 10 is faced down and connected to a circuit board 7 via a bump (not shown). An encapsulant 6 is filled between the semiconductor chip 10 and the circuit board 7. Such a structure is also disclosed in Japanese Patent Application Laid-open No. 2002-170848.
When an encapsulant has such a shape, an end portion of the encapsulant is in contact with a scribe region defined by the double-headed arrow in an outer peripheral portion of the semiconductor chip 10. Stress concentrates in a vicinity of the end portion of the encapsulant, and large thermal stress is applied to the scribe region of the semiconductor chip 10. A crack may then develop from an interface between an oxide film (interlayer insulating film) 3 that remains on the scribe region of the semiconductor chip 10 and a silicon substrate 1 to reach an inside of the semiconductor chip 10. Once a crack develops, the crack breaks a junction portion formed in the semiconductor chip 10, and thus, leakage current is produced, which may increase current consumption or may result in a circuit malfunction.